1: Field of the Invention
This invention relates to a matrix-addressed type display device having pixels disposed in a matrix arrangement.
2: Description of the Related Arts:
Conventionally, the matrix-addressed type display device has a structure in which display material, such as liquid crystals, is sandwiched between two substrates facing each other. Upon the surface of at least one substrate are disposed pixel electrodes composed of a transparent dielectric film arranged in a matrix. A switching element such as a transistor for the selective application of a voltage is also provided at each pixel electrode. Moreover, an electric charge capacitor is formed for Improving the display characteristics of each pixel element.
Hitherto, there has been proposed several liquid crystal display devices as illustrated in FIGS. 3 to 5 of the accompanying drawings.
FIG. 3 is an equivalent circuit diagram showing the circuit configuration of a thin-film transistor array substrate of a conventional matrix-addressed type display device. In FIG. 3, the reference numerals 1 and 2 designate a plurality of gate electrode paths and source electrode paths, respectively; 3, a thin-film transistor; and 4, 5, 6, a gate electrode path, a source electrode path, a drain electrode path, respectively of the thin-film transistors. The gate electrode 4 is connected to the gate electrode path 1, and the source electrode 5 is connected to the source electrode path 2. The reference numeral 7 designates an electric charge capacitor having one electrode thereof connected to the drain electrode 6 of the thin-film transistor 3 and the other electrode thereof connected to an adjacent gate electrode path 1.
Here, a gate electrode path 1 next to the gate electrode path 1 to which the gate electrode 4 of the thin-film transistor 3 is connected is defined as an adjacent gate electrode path 1.
FIG. 4 is a top view showing the structure of the thin-film transistor array substrate of FIG. 3. FIG. 5 is a cross-sectional view of FIG. 4 taken along the line V--V. In the drawings, the reference numeral 8 designates a transparent dielectric substrate, such as glass or the like. Upon this dielectric substrate 8 are formed a plurality of metal gate electrode paths 1 parallel to each other a given distance apart.
In addition, the source electrode paths 2 are spaced parallel to each other at right angles to the gate electrode paths 1 via a gate dielectric film, as will be described later. The reference numeral 9 designates a rectangular matrix array addressed by the gate electrode paths 1 and the source electrode paths 2. As shown in FIG. 4, the gate electrode 4 is formed by stretching a part of the gate electrode path 1 into the matrix array 9.
The reference numeral 11 designates an electric charge capacitor electrode superimposed over the surface of the dielectric substrate 8, and this capacitor electrode is formed by stretching a part of the adjacent gate electrode 1, that is the gate electrode 1 disposed downwards of FIG. 4, into the matrix array 9.
The reference numeral 12 designates a transparent gate dielectric film deposited over the dielectric substrate 8, the dielectric film being composed of a silicon nitride film (SiNx) and the like in such a manner as to be superimposed over the gate electrode path 1, the gate electrode 4 and the electric charge capacitive electrode 11. The gate dielectric film 12 is omitted in FIG. 4.
The reference numeral 13 is a semiconductor film formed over the gate electrode 4 via the gate dielectric film 12. Source electrode paths 2 are composed of metal and formed over the gate dielectric film 12, and a source electrode 5 is formed by extending a part of the source electrode path 2 in such a manner as to overlap the semiconductor film 13.
Moreover, drain electrodes 6 are composed of metal and formed on the thin-film 13 a given distance apart from the source electrode. The thin-film transistor 3 is composed of the gate electrode 4, the semiconductor film 13, the gate dielectric film 12 interposed between the gate electrode 4 and the semiconductor film 13, the source electrode 5, and the drain electrode 6.
The reference numeral 14 designates a pixel electrode provided on the gate dielectric film 12. The pixel electrode 14 is composed of a transparent conductive film such as indium-tin-oxide (ITO) or the like, and is formed over the entire matrix array 9 other than the area where the thin-film transistor 3 is formed, and is connected to the drain electrode 6 at the overlapping portion thereof. The electric charge capacitor 7 consists of the electric charge capacitive electrode 11, the pixel electrode 14, and the gate dielectric film 12 sandwiched between the electrodes in the area at which these three are superimposed upon one another.
The reference numeral 15 designates a transparent protective film composed of SiNx and the like and is formed over the entire matrix array 9. In FIG. 4, the protective film 15 is omitted for clarity.
The thin-film transistor array substrate consists of a plurality of pixel electrodes 14 and thin-film transistors 3 disposed in a row and column arrangement.
The matrix-addressed type display device comprises the thin-film transistor array substrate, and a non-illustrated opposing substrate having both a transparent conductive substrate and a color filter substrate disposed thereon with the non-illustrated display material such as liquid crystals sandwiched therebetween.
In the matrix-addressed type display device having the above structure, the aforementioned matrix array 9 defines a pixel. Therefore, the application of a voltage to the pixel electrode by means of the thin-film transistor 3 causes graphics and characters to be displayed. As a result, the electric charges stored at the electric charge capacitor 7 determine the display characteristic of the liquid crystal.
Since the conventional matrix-addressed type display device has the structure as set forth in the above, the efficiency in display is impaired by the presence of the matrix array region where the electric charge capacitor is formed. Accordingly, the increase in the capacitance of the electric charge capacitor and the decrease in the pixel pitch result in the drop in the ratio of angular aperture, thereby disadvantageously impairing the display characteristics.